ASML Silicon Valley

Silicon Valley at a glance

ASML Silicon Valley, located in San Jose, develops sophisticated software and metrology solutions for chipmakers, enabling ASML’s holistic lithography approach.

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Specialties

Find your passion at ASML Silicon Valley

Electron optics

Design and build some of the most advanced electron-beam measurement tools in the semiconductor industry.

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Software engineering

Find out what it’s like working as a computer scientist or software developer at ASML working in C++, C#, Python or Java.

Physics & Computer Science

Computer science and physics is at the heart of everything we do at ASML.

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Our technology in Silicon Valley

At ASML Silicon Valley, we develop sophisticated software and metrology solutions, addressing escalating complexities encountered at smaller nodes. Local customer support and technology development also ensure superior system performance and service.

Holistic lithography

It’s no longer enough to optimize the various semiconductor manufacturing steps – IC design, mask creation, lithography, etch and deposition, and metrology – in isolation. In order to achieve optimum yield at smaller nodes, it requires a holistic approach. At ASML Silicon Valley, we integrate knowledge of the lithography systems with metrology and computational lithography to drive forward cost-effective shrink for chipmakers.

Software and metrology solutions developed at ASML Silicon Valley help enhance the manufacturability of designs through co-optimization of chip designs and scanner settings. Our colleagues in San Jose also develop solutions that optimize the performance of lithography systems, maximizing production yield and stabilizing systems in high-volume manufacturing.

Sophisticated software models

In an ideal world, we would pattern flawless squares and rectangles commonly seen in the blueprint of a chip design. However, after light passes through the reticle and the light-sensitive coating material is etched away, the pattern result on a silicon wafer can be quite different.

To address these changes to the chip, we develop sophisticated software models that capture various physical and chemical effects encountered throughout the lithography process. These models and numerical algorithms are used to accurately predict how a design pattern will be printed onto a silicon wafer and then optimize its shape to generate the image we want.

High-performance computing applications

The complexity of the physics and sheer scale of the optimization problems faced at ASML Silicon Valley present challenges of their own. Today’s chips have billions of transistors, built up layer by layer with extreme precision, requiring the imaging of tens of billions of patterns that must be simulated and optimized within 24 hours – it’s an enormous, time-sensitive task. At ASML Silicon Valley, we develop innovative ways to speed up the model calculations. We harness the power of tens of thousands of computing cores to quickly process full chip blueprints – all without sacrificing accuracy. This is an iterative, computationally intensive process that requires the efficient and accurate utilization of a large-scale, distributed high-performance computing architecture.

E-beam technology

Today’s mainstream optical inspection technologies are reaching their resolution limits. With its high image resolution, e-beam metrology technology is becoming necessary to achieve accurate measurements and address shrinking margins of error. In Silicon Valley, we’re creating a new class of applications to ensure accurate wafer patterning performance and identify yield-related defects faster with higher accuracy across more wafers at the most advanced nodes.

E-beam technology uses a focused stream of electrons to measure chip geometries that are much smaller than those resolved by even the most advanced optical technology. ASML Silicon Valley brings additional metrology capability such as high-resolution imaging and voltage contrast that checks the integrity of the electrical properties of interconnect layers.

We use high-resolution e-beam images from e-beam metrology systems to improve our computational lithography models. These improved models are then used to enhance scanner control, leading to improved yield.

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Working and living in Silicon Valley

ASML Silicon Valley is located in San Jose, California – a dynamic area where technology and culture converge in a fast-paced, innovative environment. The third most populous city in California, San Jose ranks as one of the wealthiest cities in the United States.

Software heroines

Leading the way for women in ICT at ASML

Read about Mingjing Zhao, a senior software quality assurance manager at ASML in Silicon Valley, and other women as they pursue their dreams in computer science and software engineering at ASML.

Read the story