
The consolidated financial statements include the accounts of ASML Holding N.V. and all its majority-owned subsidiaries. All intercompany profits, balances and transactions have been eliminated in the consolidation. Table 2 details the consolidated statements of operations.
|
Consolidated statements of operations (EUR million) |
2005
|
2006
|
2007
|
2008 |
2009 |
|
Net sales |
2,529 |
3,582 |
3,768 |
2,954 |
1,596 |
|
Gross profit on sales |
974 |
1,454 |
1,550 |
1,016 |
458 |
|
R&D costs, net of credits |
324 |
387 |
486 |
516 |
467 |
|
Amortization of in-process R&D costs |
0 |
0 |
23 |
0 |
0 |
|
SG&A costs |
201 |
205 |
226 |
212 |
156 |
|
Income (loss) from operations |
449 |
862 |
815 |
288 |
(165) |
|
Net income (loss) |
311 |
619 |
671 |
322 |
(151) |
|
Gross profit as a % of net sales |
39% |
41% |
41% |
34% |
29% |
|
Income (loss) from operations as a % of net sales |
18% |
24% |
22% |
10% |
(10%) |
|
Consolidated balance sheet (EUR million) |
2005
|
2006
|
2007
|
2008
|
2009
|
|
Cash & cash equivalents |
1,905 |
1,656 |
1,272 |
1,109 |
1,037 |
|
Working capital1 |
1,786 |
2,236 |
1,998 |
1,965 |
1,705 |
|
Total assets |
3,756 |
3,954 |
4,073 |
3,939 |
3,727 |
|
Long-term debt |
383 |
381 |
602 |
647 |
663 |
|
Shareholders' equity |
1,712 |
2,148 |
1,891 |
1,989 |
1,775 |
1 Working capital is calculated as the difference between total current assets, including cash and cash equivalents, and total current liabilities.
Working capital is calculated as the difference between total current assets, including cash and cash equivalents, and total current liabilities.Working capital is calculated as the difference between total current assets, including cash and cash equivalents, and total current liabilities.
Each year, the Board of Management evaluates the amount of dividend that will be proposed to the Annual General Meeting of Shareholders. For 2008, a dividend was declared of € 0.20 per ordinary share of € 0.09 which was paid in 2009.
A proposal will be submitted to the Annual General Meeting of Shareholders on March 24, 2010 to declare an unchanged dividend for 2009 of € 0.20 per ordinary share of € 0.09.
The foundation of our lithography scanners is our dual-stage wafer imaging platform - the TWINSCAN system - which we introduced in 2000 and which allows exposure of one wafer while simultaneously measuring the wafer which will be exposed next. Our strong leadership in this capability has allowed us to achieve the industry's highest throughput, enabling reduced cost-per-exposure per wafer. ASML is the only lithography manufacturer that has volume production based on dual stage systems.
Our innovative immersion lithography replaces air over the wafer with fluid, enhancing focus and enabling circuit line-width to shrink to even smaller dimensions than what is possible with "dry" lithography systems. ASML pioneered this "wet" technology and has experienced strong demand for immersion-based systems, driven initially by NAND Flash solid state memory chip makers which have aggressive shrink roadmaps to reduce cost-per-memory function. Shrinking the feature sizes on chips by means of immersion systems has meanwhile been adopted by most of our customers in all other semiconductor market segments, including the DRAM memory chip and Logic chip segments as well as the Foundry contract chip manufacturers. With 166 immersion systems shipped at the end of 2009, our immersion technology is now widely accepted as the standard for critical layer high-volume chip manufacturing, solidifying our technology leadership position worldwide.
With immersion becoming the cornerstone of the modern chip factory, we have developed different immersion systems for different needs. We have optimized our TWINSCAN XT immersion systems for cost-effective imaging down to 40 nanometer patterning, while we have simultaneously developed a new dual wafer stage system called TWINSCAN NXT with improved imaging, positioning and productivity. The NXT platform can pattern features as small as 22 nanometers through the so-called Double Patterning technique which requires several exposures per layer on a chip. Imaging patterns and lines between one another without creating contacts is very demanding when it comes to the exact placement of lines and patterns, and this "overlay" requirement is uniquely served by our NXT planar wafer stage and breakthrough grid metrology. Our first NXT:1950i shipped in September 2009 and achieved overlay below the specification of 3 nanometers, which is only 12 silicon atoms across, or the length that a human hair grows in just half a second.
We complement our line of scanner products with a rapidly expanding portfolio of software and metrology products to help our customers achieve better imaging at aggressive resolutions, offering them significant revenue-generating and cost-saving opportunities. As customers optimize their scanner performance by taking into account the entire chip creation process, from design to volume manufacturing, we have called this approach "Holistic Lithography". During the chip design phase, ASML's holistic lithography software uses actual scanner profiles and tuning capabilities to create a design with the maximum process window for a given node and application. During manufacturing, ASML's holistic lithography leverages unique metrology techniques and feedback loops to monitor overlay and Critical Dimension Uniformity (CDU) performance to continuously maintain the system centered in the process window. During 2009, we launched new products such as FlexRay TM programmable illumination, Source Mask Optimization (SMO) and BaseLinerTM scanner stability, while announcing deals with major chip manufacturers.
Also in 2009, we confirmed our roadmap for EUV lithography with the first shipment of our pre-production system, for which we have received six orders to date. The first shipments are scheduled for the second half of 2010. EUV derives its name from the light source it uses, which at 13.5 nanometers is 15 times shorter than the Deep Ultraviolet ArF light source used in our most advanced immersion systems. Assembly of our first pre-production systems started in 2009 in the new EUV cleanroom facility at our headquarters in Veldhoven. The cleanroom was opened on schedule in May 2009 despite the economic downturn. The NXE system, which will be built on an evolved TWINSCAN platform, will enable our customers to extend their roadmap to chip features to 22 nanometers and smaller. Industry support for EUV was boosted by the publication of excellent imaging results from many customers who have been working on our Alpha Demo Tools located at two major industry R&D centers (IMEC in Leuven, Belgium and CNSE Albany NanoTech in New York State, U.S.). In addition, there was considerable and necessary progress reported publicly in infrastructure development, ranging from reticles and resists to source power improvements. We have published a roadmap to develop a range of EUV models, offering the greatest extendibility at the lowest cost of ownership for the future of lithography. As EUV is an emerging technology, orders and sales will be recognized when customers accept the systems in their factories.